1. Field of the Invention
The present invention relates to a semiconductor memory device such as a memory card which is capable of writing data and uses a nonvolatile semiconductor memory, and to a sales processor such as an electronic cash register and a POS (point of sale) terminal having the semiconductor memory device for storing sales data.
2. Description of the Related Art
Electrically writable and nonvolatile EPROMs and flash memories have been conventionally used in semiconductor memory devices such as memory cards. EPROMs and flash memories are nonvolatile semiconductor memories in which stored data is maintained even after power supply is stopped. These memories are widely used because of their comparatively large capacities and high data reading speeds. Once data is normally written in a nonvolatile semiconductor memory, the written data is surely maintained until the data is erased. Erasing the storage contents from a nonvolatile semiconductor memory requires control or a voltage that is different from control or a voltage required in the normal operation state, and the storage contents never change in the normal operation state. Thus, nonvolatile semiconductor memories are highly reliable. For this reason, nonvolatile semiconductor memories have been preferably used for storing sales data of electronic cash registers and POS (point of sale) terminals handling cash. For example, Japanese Unexamined Patent Publication JP-A 5-46490 (1993) discloses to use a memory card device using an electrically erasable and writable EEPROM for storing image data in an electronic still camera apparatus.
Since nonvolatile semiconductor memories surely maintain the data normally written therein, data writing into nonvolatile semiconductor memories is not easy. For this reason, there is a possibility that a writing error occurs in data writing and data writing cannot be performed normally. Whether writing is performed normally or not can be determined by collating the written data with the data to be written. When there is a difference between the data, the difference is detected as an error. In JP-A-5-46490, for an EEPROM having its memory space partitioned into a plurality of pages, the presence or absence of an error is detected for each page, and with a specific page as an error flag area, an error flag representative of the presence or absence of an error in each page is recorded in the error flag area. The data written in an error occurring page is newly written in an alterantive blank page, and the data written in the error occurring page are replaced by address data all representative of an address of the alternative page. When the data is read out, the error occurring page is determined by referring to the error flag area, the address data is read out from the whole of the error occurring page to determine the address of the alternate page by majority, and based on the determined address, the data is read out from the alternative page.
In JP-A-5-46490, since the address of the alternative page corresponding to the error occurring page is determined by majority from a multiplicity of addresses written in the error occurring page, it is necessary for the controller for controlling writing into the semiconductor memory to control writing of the address into the error occurring page after the address of the alternative page is determined. This complicates the function of the controller and increases the writing time at the time of occurrence of an error in accordance with the time necessary for writing the address of the alternative page. Since the possibility is strong that a page of a nonvolatile semiconductor memory in which an error occurs includes a memory cell being prone to result in an error, in order to surely determine the address of the alternative page by majority, it is necessary that the data amount for one page be large and the number of addresses of the alternative page written in the error occurring page be great. Since it is necessary to read a multiplicity of data and determine the address of the alternative page by majority when the address of the alternative page is read in, the data retrieval performed later is difficult and the data reading speed is low.